DSPIC30F2010T-20I/SO【PDF 5/66 页】IC DSPIC MCU/DSP 12K 28SOIC

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2010 Microchip Technology Inc.

DS70102K-page 13

dsPIC30F Flash Programming Specification

TABLE 5-7:

CONFIGURATION BITS DESCRIPTION

Bit Field

Register

Description

FWPSA<1:0> FWDT

Watchdog Timer Prescaler A

11 =1:512

10 =1:64

01 =1:8

00 =1:1

FWPSB<3:0> FWDT

Watchdog Timer Prescaler B

1111 =1:16

1110 =1:15

0001 = 1:2

0000 = 1:1

FWDTEN

FWDT

Watchdog Enable

1 = Watchdog enabled (LPRC oscillator cannot be disabled. Clearing the SWDTEN

bit in the RCON register will have no effect)

0 = Watchdog disabled (LPRC oscillator can be disabled by clearing the SWDTEN bit

in the RCON register)

MCLREN

FBORPOR

Master Clear Enable

1 = Master Clear pin (MCLR) is enabled

0 =MCLR pin is disabled

PWMPIN

FBORPOR

Motor Control PWM Module Pin Mode

1 = PWM module pins controlled by PORT register at device Reset (tri-stated)

0 = PWM module pins controlled by PWM module at device Reset (configured as out-

put pins)

HPOL

FBORPOR

Motor Control PWM Module High-Side Polarity

1 = PWM module high-side output pins have active-high output polarity

0 = PWM module high-side output pins have active-low output polarity

LPOL

FBORPOR

Motor Control PWM Module Low-Side Polarity

1 = PWM module low-side output pins have active-high output polarity

0 = PWM module low-side output pins have active-low output polarity

BOREN

FBORPOR

PBOR Enable

1 = PBOR enabled

0 = PBOR disabled

BORV<1:0>

FBORPOR

Brown-out Voltage Select

11 = 2.0V (not a valid operating selection)

10 = 2.7V

01 = 4.2V

00 = 4.5V

FPWRT<1:0> FBORPOR

Power-on Reset Timer Value Select

11 = PWRT = 64 ms

10 = PWRT = 16 ms

01 =PWRT = 4 ms

00 = Power-up Timer disabled

RBS<1:0>

FBS

Boot Segment Data RAM Code Protection (only present in dsPIC30F5011/5013/

6010A/6011A/6012A/6013A/6014A/6015)

11 = No Data RAM is reserved for Boot Segment

10 = Small-sized Boot RAM

[128 bytes of RAM are reserved for Boot Segment]

01 = Medium-sized Boot RAM

[256 bytes of RAM are reserved for Boot Segment]

00 = Large-sized Boot RAM

[512 bytes of RAM are reserved for Boot Segment in dsPIC30F5011/5013, and

1024 bytes in dsPIC30F6010A/6011A/6012A/6013A/6014A/6015]

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